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	<title><![CDATA[PublMe - Space: Posted Reaction by PublMe bot in PublMe]]></title>
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	<pubDate>Wed, 01 May 2024 20:30:16 +0200</pubDate>
	<link>https://publme.space/reactions/v/38772</link>
	<title><![CDATA[Posted Reaction by PublMe bot in PublMe]]></title>
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<p>Manta: An Open On-FPGA Debug Interface</p>
<div><img width="800" height="273" src="https://hackaday.com/wp-content/uploads/2024/04/hadimg_manta_feat.png?w=800" alt="Manta project logo - a manta ray, with cursive 'manta' written next to it" srcset="https://hackaday.com/wp-content/uploads/2024/04/hadimg_manta_feat.png 2255w, https://hackaday.com/wp-content/uploads/2024/04/hadimg_manta_feat.png?resize=250, 85 250w, https://hackaday.com/wp-content/uploads/2024/04/hadimg_manta_feat.png?resize=400, 137 400w, https://hackaday.com/wp-content/uploads/2024/04/hadimg_manta_feat.png?resize=800, 273 800w, https://hackaday.com/wp-content/uploads/2024/04/hadimg_manta_feat.png?resize=1536, 524 1536w, https://hackaday.com/wp-content/uploads/2024/04/hadimg_manta_feat.png?resize=2048, 699 2048w" data-attachment-id="675708" data-permalink="https://hackaday.com/2024/05/01/manta-an-open-on-fpga-debug-interface/hadimg_manta_feat/" data-orig-file="https://hackaday.com/wp-content/uploads/2024/04/hadimg_manta_feat.png" data-orig-size="2255,770" data-comments-opened="1" data-image-meta="{&quot;aperture&quot;:&quot;0&quot;,&quot;credit&quot;:&quot;&quot;,&quot;camera&quot;:&quot;&quot;,&quot;caption&quot;:&quot;&quot;,&quot;created_timestamp&quot;:&quot;0&quot;,&quot;copyright&quot;:&quot;&quot;,&quot;focal_length&quot;:&quot;0&quot;,&quot;iso&quot;:&quot;0&quot;,&quot;shutter_speed&quot;:&quot;0&quot;,&quot;title&quot;:&quot;&quot;,&quot;orientation&quot;:&quot;0&quot;}" data-image-title="hadimg_manta_feat" data-image-description="" data-image-caption="" data-medium-file="https://hackaday.com/wp-content/uploads/2024/04/hadimg_manta_feat.png?w=400" data-large-file="https://hackaday.com/wp-content/uploads/2024/04/hadimg_manta_feat.png?w=800"></div><p>We always can use more tools for FPGA debugging, and the <a rel="nofollow" href="https://fischermoseley.github.io/manta/" target="_blank">Manta project by [Fischer Moseley]</a> delivers without a shadow of a doubt. Manta lets you add a debug and data transfer channel between your computer and your FPGA, that you can easily access with helpfully included Python libraries.</p><p>With <a rel="nofollow" href="https://fischermoseley.github.io/manta/getting_started/#example-configuration" target="_blank">just a short configuration file</a> as input, it gives you cores you add into your FPGA design, tapping the signals of interest as an FPGA-embedded logic analyzer, interacting with registers, and even letting you quickly transfer tons of data if you so desire.</p><p>Manta is <a rel="nofollow" href="https://fischermoseley.github.io/manta/installation/" target="_blank">easy to install,</a> is developer-friendly, has been designed in Amaranth, and is fully open source as you would expect. At the moment, Manta supports both <a rel="nofollow" href="https://fischermoseley.github.io/manta/uart_interface/" target="_blank">UART</a> and <a rel="nofollow" href="https://fischermoseley.github.io/manta/ethernet_interface/" target="_blank">Ethernet</a> interfaces for data transfer. As for embedding the Manta cores into your project, they can be exported to both Amaranth and Verilog. You should <a rel="nofollow" href="https://fischermoseley.github.io/manta/" target="_blank">check out the documentation website</a> — it contains everything you might want to know to <a rel="nofollow" href="https://fischermoseley.github.io/manta/getting_started/" target="_blank">get started</a> quick.</p><p>The Manta project has started out as our hacker’s<a rel="nofollow" href="https://dspace.mit.edu/handle/1721.1/151223" target="_blank"> MIT thesis,</a> and we’re happy that we can cover it for you all. FPGA-embedded logic analyzers are a fascinating and much-needed tool, and we’ve had our own [Al Williams] tell you about <a rel="nofollow" href="https://hackaday.com/2018/10/12/logic-analyzers-for-fpgas-a-verilog-odyssey/">his on-FPGA logic analysis journey!</a></p>]]></description>
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