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	<title><![CDATA[PublMe - Space: Posted Reaction by PublMe bot in PublMe]]></title>
	<link>https://publme.space/reactions/v/37419</link>
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	<guid isPermaLink="true">https://publme.space/reactions/v/37419</guid>
	<pubDate>Mon, 01 Apr 2024 20:00:31 +0200</pubDate>
	<link>https://publme.space/reactions/v/37419</link>
	<title><![CDATA[Posted Reaction by PublMe bot in PublMe]]></title>
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<p>SatCat5: UART, SPI and I2C via Ethernet With FPGA-Based Design</p>
<div><img width="751" height="232" src="https://hackaday.com/wp-content/uploads/2024/03/satcat5_fpga_layout.jpg?w=751" alt="" srcset="https://hackaday.com/wp-content/uploads/2024/03/satcat5_fpga_layout.jpg 751w, https://hackaday.com/wp-content/uploads/2024/03/satcat5_fpga_layout.jpg?resize=250, 77 250w, https://hackaday.com/wp-content/uploads/2024/03/satcat5_fpga_layout.jpg?resize=400, 124 400w" data-attachment-id="672384" data-permalink="https://hackaday.com/2024/04/01/satcat5-uart-spi-and-i2c-via-ethernet-with-fpga-based-design/satcat5_fpga_layout/" data-orig-file="https://hackaday.com/wp-content/uploads/2024/03/satcat5_fpga_layout.jpg" data-orig-size="751,232" data-comments-opened="1" data-image-meta="{&quot;aperture&quot;:&quot;0&quot;,&quot;credit&quot;:&quot;&quot;,&quot;camera&quot;:&quot;&quot;,&quot;caption&quot;:&quot;&quot;,&quot;created_timestamp&quot;:&quot;0&quot;,&quot;copyright&quot;:&quot;&quot;,&quot;focal_length&quot;:&quot;0&quot;,&quot;iso&quot;:&quot;0&quot;,&quot;shutter_speed&quot;:&quot;0&quot;,&quot;title&quot;:&quot;&quot;,&quot;orientation&quot;:&quot;0&quot;}" data-image-title="satcat5_fpga_layout" data-image-description="" data-image-caption="" data-medium-file="https://hackaday.com/wp-content/uploads/2024/03/satcat5_fpga_layout.jpg?w=400" data-large-file="https://hackaday.com/wp-content/uploads/2024/03/satcat5_fpga_layout.jpg?w=751"></div><figure aria-describedby="caption-attachment-672387"><a rel="nofollow" href="https://hackaday.com/wp-content/uploads/2024/03/satcat5_prototype.jpg"><img data-attachment-id="672387" data-permalink="https://hackaday.com/2024/04/01/satcat5-uart-spi-and-i2c-via-ethernet-with-fpga-based-design/satcat5_prototype/" data-orig-file="https://hackaday.com/wp-content/uploads/2024/03/satcat5_prototype.jpg" data-orig-size="1502,1099" data-comments-opened="1" data-image-meta="{&quot;aperture&quot;:&quot;2&quot;,&quot;credit&quot;:&quot;&quot;,&quot;camera&quot;:&quot;MotoG3&quot;,&quot;caption&quot;:&quot;&quot;,&quot;created_timestamp&quot;:&quot;1547047412&quot;,&quot;copyright&quot;:&quot;&quot;,&quot;focal_length&quot;:&quot;3.64&quot;,&quot;iso&quot;:&quot;64&quot;,&quot;shutter_speed&quot;:&quot;0.02501&quot;,&quot;title&quot;:&quot;&quot;,&quot;orientation&quot;:&quot;0&quot;}" data-image-title="satcat5_prototype" data-image-description="" data-image-caption="&lt;p&gt;Arty A7-based prototype of SatCat5 with custom switch I/O board. (Credit: The Aerospace Corporation)&lt;/p&gt;" data-medium-file="https://hackaday.com/wp-content/uploads/2024/03/satcat5_prototype.jpg?w=400" data-large-file="https://hackaday.com/wp-content/uploads/2024/03/satcat5_prototype.jpg?w=800" src="https://hackaday.com/wp-content/uploads/2024/03/satcat5_prototype.jpg?w=400" alt="Arty A7-based prototype of SatCat5 with custom switch I/O board. (Credit: The Aerospace Corporation)" width="400" height="293" srcset="https://hackaday.com/wp-content/uploads/2024/03/satcat5_prototype.jpg 1502w, https://hackaday.com/wp-content/uploads/2024/03/satcat5_prototype.jpg?resize=250, 183 250w, https://hackaday.com/wp-content/uploads/2024/03/satcat5_prototype.jpg?resize=400, 293 400w, https://hackaday.com/wp-content/uploads/2024/03/satcat5_prototype.jpg?resize=800, 585 800w"></a><figcaption>Arty A7-based prototype of SatCat5 with custom switch I/O board. (Credit: The Aerospace Corporation)</figcaption></figure><p>To the average microcontroller, Ethernet networks are quite a step up from the basic I2C, SPI and UART interfaces, requiring either a built-in Ethernet MAC or SPI-based MAC, with tedious translation between Ethernet and those other interfaces. Yet what if this translation could be done automatically and transparently?  This is what the <a rel="nofollow" href="https://github.com/the-aerospace-corporation/satcat5" target="_blank">SatCat5 FPGA-based project</a> by [The Aerospace Corporation] aims to provide: a gateway akin to an unmanaged Ethernet switch that also supports those non-Ethernet links. Recently <a rel="nofollow" href="https://news.ycombinator.com/item?id=39730480" target="_blank">they answered</a> a range of questions about the project on Hacker News.</p><p>The project name comes from the primary target audience: smallsat and cubesat developers, which is an area where being able to route more traffic over a common Ethernet-based bus is a major boon. The provided Xilinx Artix-7-based <a rel="nofollow" href="https://github.com/the-aerospace-corporation/satcat5/tree/main/examples/arty_a7" target="_blank">reference design</a> (pictured) gives a good idea of how it can be used: it combines an Arty A7 development board with a custom PCB containing an Ethernet switch IC (SJA1105), TJA1100 transceiver, two RJ45 jacks and four PMOD connectors, here connected to two UARTs for bidirectional communication between them. Ethernet frame encapsulation is provided using the standard Serial Line Internet Protocol (<a rel="nofollow" href="https://en.wikipedia.org/wiki/Serial_Line_Internet_Protocol?useskin=vector" target="_blank">SLIP</a>), with more details covered in the <a rel="nofollow" href="https://github.com/the-aerospace-corporation/satcat5/blob/main/doc/FAQ.md" target="_blank">FAQ</a>. At a minimum an FPGA like a Lattice iCE40 is required, with an MCU capable of using the <a rel="nofollow" href="https://github.com/the-aerospace-corporation/satcat5/blob/main/doc/SOFTWARE.md" target="_blank">provided C++ libraries</a>, or a custom implementation.</p><p>Thanks to [STR-Alorman] for the tip.</p>]]></description>
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